China deploys massive RISC-V server in commercial cloud
If the US government intends to limit China’s adoption of the emerging RISC-V architecture for domestic chip development, it may be too late.
Last month, China’s Shandong University deployed a server cluster containing RISC-V CPUs. The system has a total of 3,072 cores, with 48 nodes of 64-bit RISC-V CPUs.
This is the first commercial application of the RISC-V suite in the cloud, said David Chen, Alibaba’s ecosystem director, during a presentation at the RISC-V Summit in Santa Clara, California.
The system is intended for teaching and research purposes at Shandong University but is also available for cloud computing instances, Chen said in response to a question from HPCwire for more details about the system. He added that the system was completed and delivered in September and October.
Major U.S. cloud providers, including Google, Amazon, and Microsoft, do not yet offer commercial virtual machines based on RISC-V CPUs in the cloud. Companies largely offer virtual machines based on x86 or ARM architectures.
The United States is trying to stifle China’s ability to build high-performance systems by denying it access to the latest chip technology. China is now working to reduce its reliance on proprietary Western chip technologies and pivot domestic chip development around RISC-V.
The RISC-V instruction set architecture is free to license and is an alternative to the x86 architecture, used by Intel and AMD, and the ARM architecture, licensed by companies such as Amazon, Apple, Samsung, and Qualcomm.
China’s plan for RISC-V
China has a comprehensive plan to develop domestic chips around RISC-V. This year, China’s Ministry of Science and Technology has funded RISC-V chip development efforts, and many universities and scientific laboratories are also focusing on developing chips around RISC-V.
The Chinese Academy of Sciences (CAS) is developing an advanced RISC-V chip called XiangShan-v3 in cooperation with major Chinese companies, including Alibaba, Tencent and ZTE. CAS hopes the chip will match the performance of the ARM Neoverse-N2 server CPU design, which was announced in 2021.
The RISC-V system delivered to the Shandong University system uses Sophgo’s SG2042 chip, which has a clock speed of 2GHz and 64MB of cache. The system supports PCIe Gen 4 interface.
Sophgo released a RISC-V chip earlier this year, and Alibaba worked with the company to bring the Linux operating system to the chip. Software support for RISC-V remains weak despite growing adoption, and Chen called on developers globally to support 20,000 cloud computing stacks for RISC-V.
Resistance to RISC-V regulation
The Chinese RISC-V server should attract the attention of US lawmakers, who are concerned about China using open technology to advance its domestic chip agenda.
House lawmakers called on President Joe Biden to ban American companies from working with Chinese companies on RISC-V technologies. Current restrictions on semiconductor exports, which mainly cover graphics processing units and artificial intelligence chips, do not include provisions for RISC-V technologies.
But the idea of restricting RISC-V — whether by countries or commercial entities — was met with strong resistance by RISC-V Summit attendees.
China was not directly mentioned in the keynotes, but the concept of borderless cooperation was a topic strongly endorsed by participants.
“We have faced many challenges as a world, a world, and an interconnected society. We have overcome economics. We have overcome pandemics. We have overcome trials and tribulations,” said Calista Redmond, CEO of RISC-V International, responsible for developing and advancing the RISC-V standard. Which you may find with seller restriction.”
Progress in RISC-V depends on a community working to solve problems and develop technologies. Redmond said healthy cooperation and competition push the cutting edge of technology forward.
“I want to get right to this – the right global standards have leveraged the most important technologies we’ve seen throughout history, whether it’s USB or Ethernet, and web protocols like HTTPS. These are the things that level the playing field and allow us to innovate,” Redmond said.
Some RISC-V Summit participants compared government interference in RISC-V development to interference in Linux development.
Some technology experts have been more direct in their opposition to government control of RISC-V development, which would have the opposite effect of strengthening proprietary technologies.
The request is misleading on its face; “Any restrictions would only reduce US participation in an important emerging technology while strengthening ARM’s position as a near-monopoly provider of embedded CPUs,” a hacker known as Bunnie wrote in a blog this week.
In an open letter to Biden, Bonney wrote: “Any restrictions on American persons sharing RISC-V technology will only diminish America’s role as a technology leader. Restrictions that are excessive in scope could deprive teachers of a popular tool used to teach students about RISC-V devices.” Computer in American universities, for fear of inadvertently teaching to a banned entity.
How China built a chipset plan around RISC-V
China chose to build a national chip plan around RISC-V after a failed attempt beginning in 2012 to combine all types of chip architectures — x86, MIPS, PowerPC, Alpha and SPARC — into a unified design, said Yongang Bao, deputy CIO. and communications technologies at the Chinese Academy of Sciences (CAS), during a presentation in June this year.
CAS – which is on the US Entity List – in 2019 launched a nationwide initiative to promote RISC-V in the academic and startup communities. An effort called One Chip One Student (OSOC), which teaches RISC-V chip design to undergraduates, has attracted 4,000 participants.
Chinese RISC-V companies also established the China RISC-V Alliance in 2018, with the goal of building a complete open source chip ecosystem by 2030.
Impact on software development
The idea of government intervention to limit RISC-V innovations can also impact software development.
Google officially admitted in late October that it was ramping up its efforts to port Android to RISC-V. Alibaba, in collaboration with Google, made most of its contributions to the RISC-V port to Android.
Chen said that starting in 2020, engineers at Alibaba made a tremendous effort to expand the core RISC-V functions of the AOSP (Android Open Source Project) project and conducted reliability tests.
Chinese developers are also prolific contributors to mainstream Linux support for RISC-V technologies. Canonical has an Ubuntu architecture for RISC-V processors.
On the show floor
Alibaba was the only major Chinese chipmaker in the RISC-V Summit exhibition hall, where it demonstrated systems with its chips and talked about its processors, such as the XuanTie C910 chip.
Government funding is helping Chinese vendors advance quickly with RISC-V, while some US-based RISC-V companies have struggled recently.
SiFive recently laid off 20% of its employees; However, another RISC-V company, Andes Technology, had a recruiter present at its booth, and at its booth was advertising about a dozen open engineering positions.